Long-term Time Series Forecasting based on Decomposition and Neural Ordinary Differential Equations

Long-term time series forecasting (LTSF) is a challenging task that has been investigated in various domains such as finance investment, health care, traffic, and weather forecasting. In recent years, Linear-based LTSF models showed better performance, pointing out the problem of Transformer-based approaches causing temporal information loss. However, Linear-based approach has also limitations that the model is too simple to comprehensively exploit the characteristics of the dataset. To solve these limitations, we propose LTSF-DNODE, which applies a model based on linear ordinary differential equations (ODEs) and a time series decomposition method according to data statistical characteristics. We show that LTSF-DNODE outperforms the baselines on various real-world datasets. In addition, for each dataset, we explore the impacts of regularization in the neural ordinary differential equation (NODE) framework.Comment: Accepted at IEEE BigData 202

Area-efficient, ultra-low jitter clock generators using injection locking techniques

Department of Electrical Engineeringclos

Flaxseed oil and prevention of pulmonary fibrosis

Doctor of PhilosophyDepartment of Human NutritionRichard C. BaybuttWeiqun George WangAlthough omega-3 fatty acids have been a hot issue in nutrition for years, there remains a paucity of research on the topic of omega-3 fatty acid and pulmonary fibrosis and the mechanism is still unclear. The purpose of this research is to investigate the preventive effects of flaxseed oil for bleomycin-induced pulmonary fibrosis in rats and to find the possible underlying mechanisms. There are two experiments demonstrated in this dissertation, one is with various doses of flaxseed oil in the diet (0, 2.5, 5, 7.5, 10, 12.5, and 15 % (w/w)), and the other is with different times of sacrificing animals after oropharyngeal bleomycin treatment (days 7 and 21). In the first study, three proteins including transforming growth factor-[beta] (TGF-[beta]), interleukin-1 (IL-1), and [alpha]-smooth muscle actin ([alpha]-SMA), commonly associated with fibrotic inflammation in the lung, were examined by Western blot and fatty acids composition of the diets and tissues were analyzed by gas chromatography (GC). Fifteen percent of flaxseed oil group significantly reduced septal and vascular thickness and fibrosis in the lung, and significant cardiac fibrosis in the heart. The amount of IL-1 and [alpha]-SMA decreased significantly as the amount of omega-3 fatty acids increased, whereas TGF-[beta] did not change significantly. The next study further reported the time-course effect and potential underlying mechanisms. Both interleukin-6 (IL-6), a protein associated with fibrotic inflammation in the lung, and renin, an enzyme related to renin-angiotensin system, were examined by Western blot. The time-dependent increase of IL-6 in response to bleomycin treatment was reversed by flaxseed oil diet. Although renin was not significantly different in the kidney, it suggested that the renin-angiotensin system may be involved locally. In addition, the profiles of fatty acids in both liver and kidney tissues as measured by lipidomics demonstrated a significant increase of omega-3: omega-6 ratio in the flaxseed oil-fed groups. Overall, these results indicated for the first time that the omega-3 fatty acids rich in flaxseed oil inhibited the formation of pulmonary fibrosis in a dose-dependent manner - however the moderate dose of flaxseed oil was most effective - via anti-inflammatory mechanisms, which appears associated with the modulated fatty acid composition in the tissues

10.7 A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector

An injection-locked clock multiplier (ILCM) is considered to be a promising solution that can generate low-jitter, high-frequency clocks, using a limited budget in terms of silicon area and power consumption. However, an ILCM has a critical problem in that its jitter performance is sensitive to process, voltage, and temperature (PVT) variations. Thus, in general, an ILCM must be equipped with a dedicated PVT-calibrator to mitigate the sensitivity of its performance to PVT variations. One of the most general calibration methods is to use a phase-locked loop (PLL). This method can correct static frequency deviations of a voltage-controlled oscillator (VCO) due to process variations, but it cannot prevent real-time frequency drifts due to temperature or voltage variations [1]. Recently, many efforts have been made to develop new PVT-calibrators, capable of continuous frequency tracking [1-6]. In [1-3], frequency drifts were monitored by a replica-VCO or a delay-locked loop (DLL) that used the same delay cells as the main VCO. However, in these architectures, each calibrator must spend the same amount of the power as the VCO. In addition, mismatches between delay cells limit the calibrating precision or demand an additional calibrating step. References [4-6] presented frequency-tracking loops (FTLs) based on various methods to detect the phase shifts of VCO outputs when reference-pulses are injected. Reference [4] used a time-to-digital converter (TDC) to detect the phase shifts, but it had large power consumption and silicon area due to the many digital circuits. Although the FTL of [5] used a timing-adjusted phase detector (PD), it could suffer from large in-band noise or spurs since the switches of the charge pump (CP) must be on for a considerable duration in every period. In [6], a pulse-gating technique that periodically skipped the injection was presented, but it could generate fractional spurs

A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells

This paper presents a PVT-robust, low-jitter, injection-locked clock multiplier with the frequency resolution of one tenth of the reference frequency, using a DLL-based PVT-calibrator. As the key idea, the ring-VCO and the DLL consist of identical delay cells and share the control voltage. Since the DLL continually corrects the delay of the unit delay cells, the degradation of jitter due to the drift of the free-running VCO frequency can be prevented. The RMS-jitter was 448 fs, and its variation with temperature was regulated to be less than ?? 4%

An Ultra-Low Power and Compact LC-Tank-Based Frequency Tripler Using Pulsed Input Signals

This letter presents a low power and compact area LC-tank-based frequency multiplier. In the proposed architecture, the input signals have a pulsed waveform that involves many high-order harmonics. Using an LC-tank that amplifies only the target harmonic component, while suppressing others, the output signal at the target frequency can be obtained. Since the core current flows for a very short duration, due to the pulsed input signals, the average power consumption can be dramatically reduced. Effective removal of spurious tones due to the damping of the signal is achieved using a limiting amplifier. In this work, a prototype frequency tripler using the proposed architecture was designed in a 65-nm CMOS process. The power consumption was 950 ??W, and the active area was 0.08 mm2 . At a 3.12-GHz frequency, the phase noise degradation with respect to the theoretical bound was less than 0.5 dB.close

A Low-Jitter and Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Real-time PVT-Calibrator with Replica-Delay Cells

A low-jitter and fractional-resolution injectionlocked clock multiplier (ILCM) with a delay-locked-loop (DLL)- based process-voltage-temperature (PVT)-calibrator is proposed. The ring-type voltage-controlled oscillator (VCO) and the voltagecontrolled delay line (VCDL) of the DLL consist of identical delay cells, and they share the same control voltage. Thus, by changing the ratio between the numbers of stages of the VCDL and the VCO, the frequency of the VCO can be calibrated at any target frequencies, noninteger times the reference frequency. As the amount of the unit delay is adjusted continuously by the DLL, the VCO can overcome real-time frequency drifts as well as static process variations; thus, excellent jitter performance can be sustained during any environmental variations. The proposed ILCM, designed in the 65 nm CMOS process, generated output frequenciesthat range from 1.2 to 2.0 GHz with a frequency resolution of 40 MHz and a 400 MHz reference clock. When injection locked, the integrated jitter from 1 kHz to 40 MHz of the 1.6 GHz signal was 440 fs. The proposed real-time PVT calibrator restricted the degradations of phase noise and jitter over the temperature and the supply variations to less than 0.7 dB and 20%, respectively. The active area was 0.032 mm2 and the power consumption was 3.6 mW.clos

A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier with a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector

A low-jitter, ring-type voltage-controlled oscillator (VCO)-based injection-locked clock multiplier (ILCM) with a continuous frequency-tracking loop (FTL) for process-voltage-temperature (PVT)-calibration is presented. Using a single replica-delay cell of the VCO that provides the intrinsic phase information of the free-running VCO, the proposed FTL can continuously track and correct frequency drifts. Therefore, the proposed ILCM can calibrate real-time frequency drifts due to voltage or temperature variations as well as static frequency deviations due to process variations. Since the FTL provided an additional filtering of in-band VCO noise, the ILCM was able to achieve excellent jitter performance over the PVT variations, while it was based on a ring-VCO. The proposed ILCM was fabricated in a 65 nm CMOS process. When injection locked, the RMS-jitter integrated from 10 kHz to 40 MHz of the 1.20 GHz output signal was 185 fs. The proposed PVT-calibrator regulated the degradations of jitter to less than 5% and 7% over temperatures and supply voltages, respectively. The active area was $text {0.06 mm}^{2}$ and total power consumption was 9.5 mW.clos

A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator

This work presents a low-jitter, low-reference-spur ring voltage-controlled oscillator (ring VCO)-based injection-locked clock multiplier (ILCM). Since the proposed triple-point frequency/phase/slope calibrator (TP-FPSC) can accurately remove the three root causes of the frequency errors of ILCMs (i.e., frequency drift, phase offset, and slope modulation), the ILCM of this work is able to achieve a low-level-reference spur. In addition, the calibrating loop for the frequency drift of the TP-FPSC offers an additional suppression to the in-band phase noise of the output signal. This capability of the TP-FPSC and the naturally wide bandwidth of the injection-locking mechanism allows the ILCM to achieve a very low-RMS jitter. The ILCM was fabricated in a 65-nm CMOS technology. The measured reference spur and RMS jitter of the 2.4-GHz output signal were -72 dBc and 140 fs, respectively, both of which are the best among the state-of-the-art ILCMs. The active silicon area was 0.055 mm(2), and the power consumption was 11.0 mW

30.9 A 140fs rms -Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator

An injection-locked clock multiplier (ILCM) is one of the best options to generate low-jitter high-frequency signals, while using a ring VCO. In the sense that the VCO jitter is removed periodically by the reference clock, S REF , an MDLL also can be considered to be an ILCM. However, the most critical problem of ILCMs is that their jitter performance can degrade easily due to PVT. To ensure ultra-low jitter robustly, ILCMs must be equipped with background calibration that continuously adjusts the free-running frequency of the VCO, f VCO , to stay close to the target frequency, Nf REF , where N is the multiplication factor and f REF is the frequency of S REF , thereby minimizing the frequency error. To date, various calibrating methods have been developed, and many of them [1]-[4] successfully tracked f VCO and prevented the degradation in random jitter, but none of the ILCMs succeeded in reducing reference spurs to a level comparable to that of PLLs. This is because even a slight phase error of an edge of the output signal, S OUT , could result in large reference spurs [1]. There are three major causes of the phase error, the first of which is the frequency error due to drifts in f VCO away from Nf REF , which is the main target of prior calibrators. The second cause is the phase offset, which is generated due to any systematic errors of calibrators, such as mismatches in delay cells, input offsets of phase detectors, and limited resolution of digital circuits. Recently, state-of-the-art ILCMs [3], [4] successfully addressed these two causes, but they still could not reduce reference spurs to less than -65dBc. This is because, to date, none of the ILCMs has considered the third cause, i.e., the slope modulation of the edges of S OUT , which occurs due to the periodic injection of S REF